MOEMS Packaging

Institude of Integrated Mircosystems Funded Project

Project Title:

Development of Packaging Technologies for Micro-Opto-Electro-Mechanical Systems (MOEMS)

Principal Investigator:

Prof Ricky S.W. LEE, Department of Mechanical Engineering, HKUST.

Project Duration:

July 1, 2002 to Dec. 31, 2004

Project Summary:

In general, packaging cost is about 60-80% of the total cost of IC or MEMS devices. Due to the lack of standardized test, the reliability of MEMS packaging is usually uncertain. This project focuses on packaging technology for MOEMS including development of high-density flip-chip-on-chip 3D packaging structure, development of passive alignment with low-viscosity epoxy flow, integrated silicon optical bench (SiOB) for 3D optical interconnect and the reliabilty of MOEMS packaging.

Research Output:

Publication

Tsui, Y.K., Lee, S.W.R., Wu, J.S., Kim, J.K. and Yuen, M.M.F., 2003, “Three-Dimensional Packaging for Multi-Chip Module with Through-the-Silicon Via Hole,” c Packaging Technology Conference (EPTC2003), Decemeber 10-12, Singapore, pp.1-7.

Lo, J.C.C. and Lee, S.W.R., 2004, “Experimental Assessment of Passive Alignment of Optical Fibers with V-grooves on Silicon Optical Bench, ” Proc. 6th Electronic Packaging Technology Conference(EPTC2004), December 8-10, Singapore, pp.375-380.

Lo, J.C.C., Lee, S.W.R., Wu, J.S., Kim, J.K. and Yuen, M.M.F., 2004, “Chip-on-Chip 3D Optical Interconnect with Passive Alignment,” Proc. 54th Electronic Components & Technology Conference (ECTC), June 1-4, Las Vegas, Negas, Nevada, U.S.A., pp.2015-2019.

Hon, R., Zhang, S.X.D. and Lee, S.W.R., 2004, “Formation of Through-Silicon-Vias by Laser Drilling and Deep Reactive Ion Etching,” Proc. 16th Symposium on Mechanics of SMT & Photonic Structures, ASME International Mechanical Engineering Congress & Exposition, November 13-20, Anaheim, California, U.S.A. (IMECE2004/62322 on CD-ROM)

· Lee, S.W.R. Hon, R., Zhang, S.X.D. and SO, S,m 2004, “Formation and Plugging of Through-Silicon-Vias for 3D Packaging,” Proc. 7th VLSI Packaging Workshop of Japan (VLSI2004), November 29-December 2, Kyoto, Japan, pp.105-108.

· Sham, M.L.., Kim, J.K., Lee, S.W.R., Wu, J.S. and Yuen, M.M.F., 2004, “Effects of Underfill Adhesion on Filp Chip Package Reliability, ” Proc. International IEEE Conference on Asian Green Electronics (AGEC2004), January 5-6, Shenzhen, P.R. China, pp.96-101.

· Cell KY Wong, Hongwei Gu, Bing Xu, Matthew MF Yuen, 2004, “A New Approach in Measuring Cu-EMC Adhesion Strength by AFM,” 54th Electronic Components & Technology Conference (ECTC), June 1-4, Lau Vegas, Nevada, U.S.A., pp.149-495.

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